Without limiting the scope of the invention, its background is described in connection with the deposition of silicon films by aluminum induced crystallization.
Recently there has been an increasing interest in sensors on flexible substrates towards the development of a ‘smart-skin’ for simultaneous and real-time sensing of various mechanical, biological and chemical elements. A smart skin would combine multi-sensory arrays with polymer electronics or silicon thin film transistors to sense and process a variety of stimuli. One challenge in fabricating sensors on flexible substrates is the low thermal budget of the flexible substrates, dictating low temperature processing. Polysilicon is widely used as a piezoresistive material for force/pressure sensing applications.
The need for low-temperature deposition of thin films for sensing and other applications is dictated by the trend of shifting from conventional silicon substrates to lower weight, low profile, structurally robust and lower cost flexible substrates. These flexible substrates easily conform to non-planar objects, could be batch fabricated at lower cost and enable multilayer construction. This would eventually evolve into seamless assimilation of sensors for various stimuli onto a single flexible substrate for applications in robotics, prosthetics, surgical instrumentation and industrial diagnostics to name a few.
The sensitivity of the piezoresistive material is defined by its gauge factor (GF), given by [1]:
                              G          ⁢                                          ⁢          R                =                              Δ            ⁢                                                  ⁢                          R              /              R                                ɛ                                    (        1        )            where ΔR/R is the change in resistance of the material when experiencing a unit strain of ε. The gauge factor of the piezoresistive material is highly dependent on its grain size [1]. Larger grain sizes result in higher gauge factors. In order to obtain good quality polysilicon films, LPCVD requires higher deposition temperatures in excess of 600° C. and even higher temperatures for dopant diffusion, to make the resultant film less resistive [62]. These temperatures are too high to be used with flexible polyimide substrates. Although, PECVD provides a low-temperature solution for the problem, the film obtained using this method requires post-deposition annealing temperatures in excess of 700° C. to increase the grain size and improve conductivity [28]. Alternatively, laser ablation is also used to obtain polysilicon films. However, this technique has issues with film contamination and uniformity when trying to deposit over large surfaces.
Different metals and semiconductors have been utilized as piezoresistive materials. Platinum resistors have been placed in series with indium tin oxide (ITO) as a piezoresistive material, achieving GF of 20.9, designed for elevated temperature sensors operating up to 1560° C. [2]. Thin gold films of thickness 40 nm have also been employed as piezoresistors with a GF of 2 to 4 on a SU-8 based mechanical sensor [3]. In addition, thick film resistors comprising of ruthenium oxide powder and glass frit in paste form have been used as a piezoresistive sensing material and GF of 2 to 30 have been achieved [4]. Single crystal diamond shows a very high GF of 2000 but for most applications it is prohibitively expensive. Alternatively, polycrystalline diamond thin films deposited by chemical vapor deposition showed GF of 100. In a particular case, 0.5 micron thick boron doped polycrystalline diamond resistors were implemented to achieve a GF of 22 [5]. For nickel-silver (Nix—Ag1-x) thin films, a GF of 2.2 to 2.4 was demonstrated when x=0.35 [6]. Nichrome (Ni:Cr=80:20) thin film resistors embedded on polyimide showed a lower GF of 1.3 [7]. GF of 4 to 5 have been realized by tantalum nitride-copper (TaN—Cu) nanocomposite thin film resistors with a near zero temperature coefficient of resistance [8]. Strained Si0.9Ge0.1 resistors of thickness of 200 nm deposited by MBE showed 30% increase in their piezoresistive coefficient π66 compared to π44 of silicon for the doping concentration of NA=1018 cm−3, thus making it more sensitive than silicon thin film piezoresistors [9]. Thin germanium films were evaporated on Kapton as substrate at low temperatures to achieve a GF of 33 to 42 and as high as 100 [10]. Amorphous carbon layers sputter-deposited at low temperatures (<150° C.) have also been used as strain gauges with a GF between 36 and 46 [11]. Giant piezoresistance effect has been observed in p-type Si nanowires grown along <111> and <110> directions compared to bulk p-type Si enabling its use in nano-electromechanical systems on flexible substrates [12].
Polycrystalline silicon is one of the most widely used piezoresistive thin film materials as well as in other MEMS applications and CMOS technology. In particular, its relatively high gauge factor (GF) value compared to metals, combined with its CMOS process compatibility and availability at a reasonable cost make it very attractive as a piezoresistive material for force and pressure sensing applications. Since polysilicon film constitutes of grains of various sizes separated by grain boundaries. P. J. French et al. [1] gave the GF for a single polysilicon grain as follows:
                              G          ⁢                                          ⁢          F                =                  1          -                                    ∑                              S                ii                ′                                            S                ij                ′                                      ⁢                          (                              1                -                                  δ                  ij                                            )                                +                                                    ρ                g                            ×                              π                ig                                                                    ρ                g                            +                                                                    (                                                                  2                        ⁢                        w                                            +                      δ                                        )                                    ⁢                                      ρ                    b                                                                    [                                      L                    -                                          (                                                                        2                          ⁢                          w                                                +                        δ                                            )                                                        ]                                                              +                                                    ρ                b                            ×                              π                ib                                                                    ρ                b                            +                                                                    [                                          L                      -                                              (                                                                              2                            ⁢                            w                                                    +                          δ                                                )                                                              ]                                    ⁢                                      ρ                    g                                                                    (                                                            2                      ⁢                      w                                        +                    δ                                    )                                                                                        (        2        )            where:
S′ij and S′ii are compliance coefficients for Si obtained from its elastic coefficients [13];
δ is the boundary thickness (nm);
δij is the Kronecker delta function;
ρg and ρb are grain and barrier resistivities, respectively;
πig and πib are grain and boundary piezoresistive coefficients;
L is the grain size; and
w is the barrier width created due to depletion of carriers inside the grain.
Eq. (2) shows that GF is higher for large grain sizes. Hence the sensitivity of the polysilicon film to applied strain increases with increase in its grain sizes.
Fabrication of piezoresistor-based pressure sensors on flexible polyimide substrates is limited by the glass transition temperature of the specific polyimide used, which sets the value for the maximum deposition and/or annealing temperature of the piezoresistive thin film such that the integrity of flexible polyimide substrate is maintained.
Earlier work on polysilicon piezoresistive pressure sensors on silicon substrates involved deposition of polysilicon by Low Pressure Chemical Vapor Deposition (LPCVD) at temperatures of 620° C. and above [14,15,16,17], followed by doping by ion-implantation or diffusion, to achieve specific resistivity Annealing at high temperatures is carried out to activate the dopant, stabilize the polycrystalline material by increasing the grain size and removing lattice damage during doping [18]. However, due to thermal budget restrictions of the flexible substrate material, polysilicon films deposited by LPCVD can not be used.
Another commonly used polysilicon deposition technique is Plasma Enhanced Chemical Vapor Deposition (PECVD). Hydrogenated microcrystalline silicon film at temperature below 400° C. is obtained by PECVD [19]. As the substrate temperature during PECVD deposition is further reduced, the quality of the film degrades and film obtained is amorphous in nature [20]. The resultant film requires silicon dehydrogenation step and crystallization at higher temperatures. In-situ doping of the amorphous silicon is required to obtain conductive layers, followed by annealing at temperatures around 750° C. for electrical activation [20]. This condition also restricts the use of PECVD for deposition of polysilicon on flexible substrate. However, RF-biased RF-inductively coupled PECVD tubular system provides an attractive option for depositing polysilicon with grain sizes up to 80 nm without any post-heat treatment and at temperatures below 77° C. has been reported [21].
Excimer laser annealing [22,23,24,25,26] of amorphous silicon films results in a defect free polysilicon film with large grains. Although this technique is compatible with low-temperature substrates, it has the disadvantages of being expensive, and highly susceptible to variations in the laser beam, which affect the film quality. It also has a narrow operating window dependent on the laser beam spot-size [27] which reduces throughput, and possibly introduces contamination due to the molten silicon layer from the substrate [28,29]. Another method of low-temperature deposition of polysilicon is by laser ablation [30,31]. However, preliminary tests on pulsed laser ablated polysilicon gave a non-uniform film with clusters of silicon islands, which made the patterning of the film difficult.
Another method of depositing amorphous silicon is by conventional DC magnetron sputtering [32,33], which can be a low-temperature process. Nevertheless, in order to obtain a polycrystalline film, the sample is to be subsequently annealed at a higher temperature (>500° C.) which makes this technique incompatible with a plastic substrate or any material with a lower thermal budget. Different methods of annealing such as laser annealing, furnace annealing or rapid thermal annealing can be used for the recrystallization step. [18] However, they require annealing temperatures in excess of 900° C. with anneal times ranging from 15 secs to few hours depending on the method used. RF sputtering at 13.56 Mhz was used to deposit microcrystalline silicon (μcSi:H) with grain sizes of 20 nm at the substrate temperature of 100° C. with argon (Ar) and with partial pressure of less than 40% of hydrogen (H2) gas. The film showed incorporation of hydrogen [34]. Polysilicon was also deposited at substrate temperatures of 470° C. to 490° C. using ultra-high vacuum sputtering system with RF (100 MHz) and sputter gas mixture of Ar+H2. The polysilicon grain sizes obtained were 40 nm. Lower substrate temperature of 300° C. gave the polysilicon grain size of 26 nm. Low temperature deposition of polysilicon was also achieved by a bias-sputtering process in presence of Ar gas, in addition to H2 and mix of H2O, CO and CO2 gases with individual partial pressures of 1.0×10−8 Ton or less, and at substrate temperatures ranging from 400° C. to 700° C. The average grain size obtained in this case was 80 nm at the deposition temperature of 550° C. [36]. Y. H. Jang et al. [37] described the deposition of polysilicon at 300° C. using a very high frequency (182.5 MHz) sputtering by capacitively-coupled parallel plate electrodes using Ar and H2 sputter gases. The polysilicon grain sizes obtained in this case was 20 nm. J. Joo described the use of a 2 MHz inductively coupled plasma (ICP) source based ionized magnetron sputtering with optimized Ar:H2 gas flow ratio of 10:6 to obtain polysilicon films at a substrate temperature of 250° C. with grain sizes of 50-70 nm [38]. Pulsed DC magnetron sputtering was used by P. Reinig et al. to deposit poly-Si thin films at the substrate temperature of 450° C. in only Ar environment. The maximum polysilicon grain size obtained was 60 nm [39]. K. Xu et al. deposited polysilicon films at a substrate temperature of 200° C. on thin gold-coated glass and at 140° C. on polyethyleneterephthalate (PET) substrate using DC magnetron sputtering with 5% H2, 10% Kr, and 85% Ar. The polysilicon grain sizes obtained were (95±5) nm [40,41].
None of the cited works above evaluated the piezoresistive properties of the resultant polysilicon films. As a result, there is a need for a low temperature method for fabricating silicon piezoresistors that has a short anneal time, does not require additional annealing or doping and is suitable for flexible substrates.